lockheedmartin.eightfold.ai
ASIC & FPGA Design Engineer Stf - E4
Lockheed Martin · Boulder · Littleton · Louisville
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Cleared Colorado does not collect applications.
- Clearance
- TS/SCI · active required
- Workplace
- Boulder · Littleton · Louisville
- Employer posted
- Aug 14, 2026
- First discovered
- Aug 20, 2026 · Found 12 days ago
- Last source verification
- Aug 31, 2026
- Employer posting
- 996476227053
- Salary
- $135,700 - $251,900
- Work mode
- Onsite
At a glance
ASIC & FPGA Design Engineer Stf - E4 is a TS/SCI · active required role from Lockheed Martin with Boulder, Littleton, Louisville named as a Colorado workplace. The employer identifies the role as onsite and lists compensation as $135,700 - $251,900. Use the employer posting for the complete responsibilities, qualifications, and application.
Observed listing lifespan
How long similar source listings remain available
Across 966 observed TS/SCI publication periods, the estimated median source availability is 30 days. This listing has been in its current observed publication period for 12 days and is younger than 66% of those observed periods. This measures employer-source availability, not time-to-hire or time-to-fill.
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